1. Field of the Invention
The present invention relates to a semiconductor clamping circuit, and more particularly, it is concerned with improvement of stability of a clamping potential in a MOS-type semiconductor clamping circuit.
2. Description of the Background Art
Referring to FIG. 9, a circuit diagram of an N-channel MOS transistor (referred to as N-MOS transistor hereinafter) is shown. AMOS transistor includes a source terminal S, a gate terminal G, and a drain terminal D. A portion under a channel region between source and drain is called a backgate BG. A potential applied to the backgate region is a so-called bulk potential, and usually a substrate potential Vbb is applied as the bulk potential.
FIG. 10 is a sectional view schematically showing an example of the structure of the N-MOS transistor as represented by the circuit diagram of FIG. 9. In the structure shown in FIG. 10, a P.sup.- -type semiconductor substrate 1 is employed. A P-well 3 is formed within substrate 1, and an N.sup.+ -type source 5a and an n.sup.+ -type drain 5b are formed in P-well 3. A gate electrode 6 is provided between source 5a and drain 5b. In such N-MOS transistor, a negative substrate bias potential Vbb is applied to substrate 1 via a P.sup.+ connection region 1a and also applied to P-well 3 via a P.sup.+ connection region 3a. In other words, substrate potential Vbb is applied as a backgate potential V.sub.BG of the N-MOS transistor shown in FIG. 9.
FIG. 11 is a graph schematically showing the relationship between an absolute value of backgate potential V.sub.BG and a threshold voltage Vth of the MOS transistor. More particularly, dependency of threshold voltage Vth upon backgate potential V.sub.BG is expressed by ##EQU1## where Vth.phi. represents a constant, K represents a constant of substrate effect, and .phi..sub.FP represents a Fermi level.
Although substrate effect constant K somewhat varies depending on manufacturing process of the transistor, it can be considered to have such a numerical value that threshold voltage Vth changes by 0.1 V as backgate potential V.sub.BG changes by 1 V. Such dependency of threshold voltage Vth upon backgate potential V.sub.BG cannot be ignored.
FIG. 12 is a circuit diagram showing an example of a clamping circuit including m N-MOS transistors connected in series with each other. In this clamping circuit, each transistor has its gate connected to its drain, and substrate potential Vbb is applied thereto as the backgate potential. Using the clamping circuit, a node A is clamped at a certain potential.
For instance, if each transistor has threshold voltage Vth, when a potential of node A exceeds Vth.times.m, series-connected transistors allow a current to flow from node A to the ground GND. In other words, the clamping circuit operates so as to keep node A at the potential of Vth.times.m.
Assume that bulk potential V.sub.BG of each N-MOS transistor is changed by .DELTA.V.sub.BG. Specifically, assuming that .delta.Vth/.delta.V.sub.GB =0.1, m=15, and .DELTA.V.sub.BG =2 V, variation .DELTA.V.sub.A of clamping level V.sub.A at node A is given by EQU .DELTA.V.sub.A =(.delta.Vth/.delta.V.sub.BG).multidot..DELTA.V.sub.BG .multidot.m=0.1.times.2.times.15=3 (V)
In other words, it results in the fact that clamping level V.sub.A at node A is offset from its design value by as much as 3 V.
As described above, substrate potential Vbb is applied as backgate potential V.sub.BG of each MOS transistor in the conventional MOS-type semiconductor clamping circuit, and therefore, threshold Vth of the MOS transistor varies as substrate potential Vbb changes, resulting in the clamping level being offset from the design value.